NIST Nanowire Transistors on SOI


New design simplifies processing and on/off switching

Using SOI as the substrate, researchers at the National Institute of Standards and Technology (NIST) have overcome some of the main challenges to making silicon nanowire devices. As noted in the journal “Nanotechnology” (June, 2005), the NIST design uses a simplified type of contact between the nanowire channel and the positive and negative electrodes of the transistor. The design allows more electrical current to flow in and out of the silicon, and allows the devices to be switched on and off more easily. The nanowire transistors were made using conventional lithography, indicating that the design will enable the industry to retain its existing silicon technology infrastructure even at nanoscale dimensions.

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