Hitachi demonstrates why it has the smallest Vth variability, and identifies the remaining components of random doping fluctuation.
In a “Comprehensive Study on Vth Variability in Silicon on Thin BOX (SOTB) CMOS with Small Random-Dopant Fluctuation: Finding a Way to Further Reduce Variation,” (N. Sugii et. al., IEDM 2008) Hitachi scientists at the Central Research Laboratory demonstrated that the planar FDSOI devices fabricated on SOTB have the smallest Vth variability among planar CMOS due to low-dose channel and back bias control.
The SOTB device is suitable because:
- it has a simple step-type retrograde doping profile,
- it needs no Halo implant, which make RDF phenomena complex, and
- applying back bias can provide additional information by modulating the depletion layer in the substrate.
The local variation components of the SOTB devices are about half or one third of the typical bulk values. Moreover, with good short channel effect immunity, the SOTB devices structure has weak dependence on Vds and ΔLg, thus smaller variability can be achieved.
Regarding the global variation, the relationship between SOI thickness, ΔΤSi, and Vth was studied. The result suggests that decreasing the silicon thickness variation, σTSOI, is required for low dose channel devices.
In SOTB, this requirement can be mitigated. By keeping σTSOI at 1nm or less in order to eliminate dropout transistors, the SOTB can further reduce Vth variation (virtually AVt<1.0 is expected due to extremely small local variation) by applying Vsub on each chip, because the variation due to σTSOI is most likely global.
Finally, the authors conclude that in order to achieve smaller σVth after reducing RDF requires:
- strict control of SCE immunity,
- decreasing body-thickness variation less than 1nm in standard deviation σ, and
- adaptive-bias control to compensate for global variation, which is the advantage of SOTB.