RF-SOI is good for more than integrating RF switches. Other key functions typically found inside RF Front-End Modules (FEM) like power amplifiers (PA), RF Energy Management, low-noise amplifiers (LNA), and passives also benefit from integration.
Last year, ST announced a monolithic approach with a new RF-SOI process called H9SOI_FEM that allows the integration of all those key FEM functions.
This process is an evolution of the H9SOI SOI process, a groundbreaking technology introduced by ST in 2008 and subsequently used by customers to produce more than 400 million RF switches for mobile phones and Wi-Fi applications. Building on that experience, ST optimized H9SOI for creating integrated front-end modules, resulting in the H9SOI_FEM offering a Factor of Merit (FoM) for switches 2x better than the previous H9SOI generation.
The new process greatly reduces the size of multi-band radios for 4G and other high-speed wireless connections.
Integration drivers and challenges
The market for 4G-LTE devices based on the RF-SOI process is growing at a remarkable 60% annual rate. Driving this progress are phone makers and operators wanting to speed-up and minimize reference-design variants, which require an RF front-end able to support several tens of bands. The required qualities of flexibility, tune-ability, and integration rely on the wide usage of RF-SOI processes that provide good RF switch performance (Ron, Coff) whereas standard bulk processes deliver less robust isolation (poor Coff).
So far, the biggest RF-SOI challenge has been to minimize the performance gap versus traditional JFet GaAs and Silicon-on-Sapphire (SoS) processes. In the last few years, we have seen it become possible to reduce the figure of Merit (FoM =Ron*Coff) by a factor of two with RF-SOI technologies. As a consequence, it’s now possible to get 0.5 dB Insertion Loss (IL) @2 GHz for a single-path 10-throws RF switch.
Meeting the challenging requirements of LTE has entailed a specific focus on linearity to improve IMD parameters and avoid the use of additional filters. In this way, very low harmonics (H2= -80 dBm and H3=-75 dBm) have been reached with Pin=26 dBm@2 GHz. Based on these positive results, RF-SOI is now a mainstream solution and the most effective way to produce an RF switch.
Integrating the PA, LNA and passives
With an RF FEM, a key component to integrate is the Power Amplifier (PA). The Power Added Efficiency (PAE) is a figure of merit for PAs. So far, the weakness of the bulk CMOS PA has been the reduced PAE versus GaAs. Now, a specific n-type Lateral Extended Drain MOS (nLEDMOS) RF-SOI device has enabled the realization of excellent performance such as PAE > 80% @ 2GHz.
Figure 2. ST RF-SOI 4mm nLEDMOS load-pull measurement, giving maxPAE at 80% (blue line) and max DEff above 85% (red line) at 12dB gain (green line) @1.9GHz.
On top of reliability and performance, the benefits of nLEDMOS are ease of design and a more secure approach because the component can handle more than 12V. In addition to a high PAE, other challenges have been addressed. Improved linearity, for example, has a significant impact on the Adjacent Channel Leakage Power Ratio (ACLR), and the need to embed the output matching network with low insertion losses. pLEDMOS can also be very useful for RF power management devices including Power Tracking (PT) and Envelop Tracking (ET).
Figure 3. A 3G Band I power amplifier, using an nLEDMOS device, embedded in an LGA package, demonstrates RF-SOI technology’s ability to reach 3G specifications.
Another RF-SOI target is Low Noise Amplifier (LNA) integration using a smaller lithography (0.13µm) transistor. It has just been demonstrated that 802.11ac requirements are fully achieved with 1.5 dB NF, 12 dB gain, and 7 dBm IP3. The other key blocks available with Wi-Fi modules, power-amplifiers, and switches can also be fully integrated using existing RF-SOI devices.
Figure 4. A 5 GHz LNA suitable for 802.11ac WiFi applications.
Moreover, there is a need to embed filtering functions using passives. Then, thanks to a thick copper back-end and substrate resistivity > 1Kohmcm, key functions like a diplexer, low-pass/band-pass filters for GSM, and couplers can easily be integrated. Pcell for coils are also available to speed-up the design phase.
Figure 5. A GSM/DCS diplexer, designed in ST’s RF-SOI CMOS technology, achieves a very compact form factor.
Increased manufacturing capacity, shorter cycles
H9SOI_FEM is suitable both for devices targeting the low end of the market, where low cost and extensive integration are crucial, as well as the high-end smartphone segment. High-end products typically require a combination of many frequency bands to support not only 2G, 3G and 4G standards, but also various other wireless connectivity standards such as Bluetooth, Wi-Fi, GPS and NFC (Near-Field Communication) for contactless payments.
These are demanding, volatile, high-volume markets. Therefore, ST has also invested to expand our manufacturing capacity. We developed a simplified process flow with fewer masks and fewer process steps to enable extremely short overall lead-times and supply flexibility. Products designed by our customers leveraging the H9SOI_FEM process are now ramping in volume. With all these factors in place, we’re pleased to report that the response from our customers has been extremely favorable.
Further detailed information on H9SOI_FEM can be found on ST’s website (click here).