Why Dan Hutcheson/VLSIresearch, Inc. (finally!) Likes FD-SOI

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Dan Hutcheson, CEO of VLSIresearch, Inc. finally likes FD-SOI. That’s important, because he’s a really influential person in the chip world. Everybody who’s anybody in the chip biz pays attention to what VLSIresearch, Inc. has to say.

Dan recently gave a talk entitled “FD-SOI: Disruptive or Just Another Process?” to a packed-to-the-brim room during the FD-SOI Symposium in San Jose. (The ppt he used there is available on the SOI Consortium website – download it for free here).

DanHutchesonVideopicHappily for those who didn’t make it to San Jose, Dan then went into the studio and made a video encore of his presentation for all to see – and it’s now posted on his weSRCH site. So you get not just his slides, but also his explanations and comments.

It’s about 20 minutes long – and worth every second. (Recommendation: open the ppt presentation (link here) and the video (link here) in separate windows so you can follow his slides as he talks.)

But for those of you who just want a quick recap, here are some of his key points.

He Did A Survey

Dan, as he’s always quick to point out, is an economist, albeit one extremely well-versed in chip technology. He always thought SOI was an elegant solution, but didn’t see cost savings in the fab as a driver. When asked to give a talk in San Jose, he decided to brush up a bit on what people were saying about FD-SOI. So he did an informal survey – and of course, being Dan, he can talk to just about anyone he wants.

In this case, he talked to decision makers from about a dozen top companies in the chip biz – enough to give him a 95% confidence level in his results. And the results are impressive: almost ¾ said they had FD-SOI designs underway or had already used it, while only about a third said they’ll stick firmly to bulk.

And Found That It’s About Time-to-Money

It turns out that there are companies out there doing both FinFETs and FD-SOI. Why? They’ve figured out the differentiable features, they told him. And some designers are now saying that FD-SOI is actually easier to design in than FinFETs, with one company reporting that design time in FD-SOI was half that of FinFETs.

Dan learned that the two biggest drivers of FD-SOI are IoT and automotive – IoT because those super power-stingy chips get enormous leverage out of back biasing, and automotive for reliability (and for both they get ease of analog integration).

(Courtesy: VLSIresearch, Inc. and SOI Consortium)

But at the heart of it, it’s a business case: “It’s not about cost,” he says. “It’s about time-to-money.” With FD-SOI, TTM is significantly faster.

(Courtesy: VLSIresearch, Inc. and SOI Consortium)

Those that go with FinFET are more often a big company (so they can afford the high NRE* costs) with a huge market, big die and a lot of digital. But if the market’s smaller, faster-moving and needs scaled-down NRE costs, then the people Dan talked to said they are turning to FD-SOI. They see it getting them to market faster, gives them lots of “knobs” and advantages in terms of power, reliability and analog integration, it’s easier to design in, and really enables product differentiation. In fact Dan had analog folks telling him that FD-SOI gave them back some of their favorite tricks and tools that they’d lost after the 130nm node.

(Courtesy: VLSIresearch and SOI Consortium)
(Courtesy: VLSIresearch, Inc. and SOI Consortium)

Finally, Dan sees FD-SOI as a technology with both a long history and a long lifetime ahead. FD-SOI is not in itself disruptive, but is rather an enabler of disruption. The disruption, he says, is IoT. By all means check out his video if you want more detail on his perspective on IoT, automotive and the foundry offerings.

 In conclusion, he urges users to strengthen the ecosystem’s momentum by disclosing their success stories – though he also sees how they might be reluctant to, as FD-SOI is the secret sauce that gives them a huge competitive advantage. But in the end rewards will be reaped, as driving volume up will drive costs down.

If you have a good FD-SOI design story you’d like to share, let us know here at ASN – we’ll be happy to consider it for publication, to help get the word around.

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*NRE = non-recurring engineering. In a fabless scenario, there are NRE for IP and design (engineering costs, up-front and royalty-based IP costs), NRE for masks and fabrication (mask costs, wafer prototype lots, tools costs, probe cards, load-boards and other one-time capital expenditures), and NRE for qualifications (ESD, latch-up and other industry-specific qualifications, as in automotives).





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