2018 Greetings from the SOI Consortium (and a peek at what’s ahead)


ASN asked Carlos Mazure and Giorgio Cesana, the Executive Directors of the SOI Consortium, to take a moment to share their outlook for 2018. Here’s what they had to say.

First of all, we’d like to wish everybody in the SOI ecosystem a safe, happy and prosperous 2018. We just finished up a great year, and now look forward to exciting prospects in the months to come.

Taking a quick look back, 2017 was marked by significant growth for RF-SOI markets, and with key product announcements for FD-SOI (accompanied by a very positive change in how it is viewed). In both domains, the foundries announced their roadmaps, so now the current sweet spots and future directions are clearly established.

Let’s take a moment to consider RF-SOI. As those following wireless markets know, RF-SOI has been the basis for antenna front-end modules in all the world’s smart phones for a few years now. With 2018, we see the industry turn its attention to 5G, with sub-6GHz in priority but also addressing the mmW space. Thanks to various flavors of RF-SOI, and RF integration in FD-SOI, we’ll move into a new phase where wireless will get faster and lower power than ever before.

This will be a hot topic in both the SOI Consortium symposiums around the world this year, and in articles coming your way here in ASN.

Another hot topic will be exciting new products coming out on FD-SOI. Chip design and manufacturing is of course always a fairly long process, and we’ve talked about the importance of building the ecosystem over the last few years. Now, a good ecosystem is in place. The design tools are ready and validated at the fabs, and key IP is ready. Of course with time there will be more and more IP, but lack of IP is no longer a barrier to design starts. Embedded memory – eMRAM – is another subject that designers want to learn more about, so that will be part of what we’ll be covering.

Photo courtesy: SOI Consortium / Adele Hars

Last year we saw a growing list of successful FD-SOI tape-outs. In 2018, these chips will be ramping in volume. So this year, we look at products.

We’ll be inviting those companies that are ramping in silicon to present their chips at the various symposia we organize around the world: Silicon Valley in the spring, Tokyo in the summer, China in the fall.

Our symposia will again be accompanied by tutorial days, which have been very popular and successful. In this year’s tutorials there will be a particular focus on RF, analog and mixed-signal design, and they’ll dive deeper into how to use back biasing techniques for further boosting performance and lowering power.

So we’re at the beginning of what should be a very exciting year. We’d like to take a moment to thank all the member companies in the SOI Consortium for their enthusiastic support. And we look forward to welcoming new members over the course of this year.

With warm regards,

Giorgio Cesana and Carlos Mazure

Executive Directors of the SOI Consortium