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September 25th: FD-SOI Design Tutorial, Shanghai

Shanghai  FD-SOI Tutorial:
from process through design insights towards system level implementations

World reputation professors and scientists, as well as industry specialists in the field of FD-SOI CMOS are getting together for a one day tutorial dedicated to FD-SOI. The presentations will cover diverse fields of this technology: from process flow and design related process features, through design techniques insights and up to system level Silicon implementations. They will both cover analog and digital design topics, illustrated by up to date realizations.

The FD-SOI Tutorial is co-organized by VeriSilicon & SOI Industry Consortium.

REGISTRATION AND MORE INFOS (Registration is free of charge and open until September 13th)


08:30 – 09:00 REGISTRATION

9:00 – 9:35       FD-SOI Technology Overview,
Bich-Yen Nguyen, Senior Fellow, Soitec

9:35 – 10:10     Analog, RF and mixed signal design with FD-SOI,
Andreia Cathelin, Fellow, STMicroelectronics

10:10 – 10:30 BREAK

10:30 – 11:05   Integrated RF Design Using 22 FDX,
Tom McKay, Director, RF Innovation, RF Pathfinding- Santa Clara,  Global foundries

11:05 – 11:40   Deep learning @ ST, Ultra Low Power Artificial Neural Network SOC in 28 FD-SOI,
Nitin Chawla, Director, STMicroelectronics

11:40 – 13:20   LUNCH

13:20 – 13:55   FD-SOI EDA & IP Process Flow,
Christophe Tretz, SOI Consortium

13:55 – 14:30   Digitalizing Embedded NVMs,
Jean-Pascal Bost, CEO of Evaderis

14:30 – 14:50   BREAK

14:50 – 15:25   Reverse and Forward Bias Design Using FD-SOI,
Philippe Flatresse, Soitec

15:25 – 16:00   IoT Processors Using FD-SOI,
Eric Flamand, CTO, Greenwaves

16:00 – 16:35   Energy-Efficient Digital and Mixed-Signal Design in FDSOI
Borivoje Nikolić, Professor of UC Berkeley

16:35 – 17:00   Q&A


Event location:  Laurel Lounge, 2nd Floor, Evergreen Hotel    长荣桂冠酒店2楼 桂冠厅

No.1136, Zuchongzhi Road, Pudong New Area (Near Jinke Railway Station)    浦东新区祖冲之路1136号(金科路地铁站旁)

Maps &Directions


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