Good news: there are far fewer bigoted extremists out there when it comes to FD-SOI vs. FinFETs. People want the best technology for their application. It’s that simple. That’s a key piece of news from the updated survey by Dan Hutcheson, CEO of VLSI Research, which he presented in the afternoon session of the SOI […]
Tag: rf
GF Simplifies RF-SOI and FD-SOI Design for 5G with New Partnership Program
GlobalFoundries’ new ecosystem partner program, called RFwave™, aims to simplify RF design and help customers reduce time-to-market for a new era of wireless devices and networks (read the full press release here). The program aims to give designers a low-risk, cost-effective path to highly optimized solutions that leverage GF’s platforms including RF on FD-SOI and […]
Silicon Valley FD-SOI 2018 Training Day is April 27th – Don’t Miss It!
Following the immense success of last year‘s FD-SOI training day in Silicon Valley, the SOI Consortium has another one planned for the end of April this year. If you want to start learning how to leverage FD-SOI in your chip designs, this is a great place to start. Click here for information on how to […]
SEMI Honors RF-SOI Innovators Raskin & Aspar
RF-SOI innovators Jean-Pierre Raskin of UCL and Bernard Aspar of Soitec changed the course for key RF chips. The industry has long recognized their contributions: their solution for “trap-rich” RF-SOI wafers is now the starting point to virtually every FEM in every smart phone on the planet (really!). And of course here at ASN we’ve […]
China FD-SOI/RF-SOI Presentations Posted; Events Confirm Tremendous Growth
The FD-SOI and RF-SOI events in Shanghai and Nanjing were absolute success stories. Over the course of five days, hundreds of executives and design engineers packed halls for talks by the leaders of the top ecosystem players, and for tutorials given by the world-renowned design experts. These annual events have been ongoing in China now […]
Body Biasing: It’s Not an Obligation, It’s an Opportunity. And Other Take-Aways from the FD-SOI Design Tutorial Day.
Over a hundred chip designers packed the room for the SOI Consortium’s recent FD-SOI Design Techniques Tutorial Day. Five professors and scientists from top institutions covered design techniques with real examples in digital, mixed-signal, analog, RF, mmW and ULV memory. Although it was in Silicon Valley, people actually flew in from all over the world […]
Samsung Announces Next FD-SOI Node: 18nm
Big News: Samsung has officially revealed that their next FD-SOI node is 18nm. The announcement was made at the recent Samsung Foundry Forum, which showcased a number of new technologies that the company says will help enable the development of new devices connecting consumers in entirely new ways. (You can read the full press release […]
ARM Steps Up! And More Good News From Consortium’s FD-SOI Symposium in Silicon Valley
ARM is stepping up its effort to support the FD-SOI ecosystem. “Yes, we’re back,” confirmed Ron Moore, VP of ARM’s physical design group. This and much more good news came out of the recent FD-SOI Symposium organized in Silicon Valley by the SOI Consortium. The full-day Symposium played to a packed room, and was followed […]
Quick Preview of (Great!) FD-SOI Design Tutorial Day (14 April ’17, Silicon Valley)
Would you like to better understand FDSOI-based chip design? If you’re in Silicon Valley, you’re in luck. On April 14th, the SOI Consortium is organizing a full day of FDSOI tutorials for chip designers. This is not a sales day. This is a learning day. On the agenda are FD-SOI specific design techniques for: analog […]
NXP’s new i.MX 7ULP On 28nm FD-SOI – Yes! Industry’s Lowest Power General Purpose Applications Processor (part 1)
They’re calling it, “The most advanced, lowest power-consuming GPU-enabled MPU on the market.” It’s NXP’s new i.MX 7ULP general-purpose processor, and it’s on 28nm FD-SOI. They’ve got a nifty video summing it all up – you can watch it here. With the i.MX 7ULP, NXP is first to market with an FD-SOI applications processor offering […]