As you may have read in the first part of this series, Soitec (the industry’s leading supplier of SOI wafers) says its 200mm RF-SOI wafers have been used to produce over 20 billion chips, and the company is now in high-volume manufacturing of a 300mm version of its wildly successful RFeSI line (see press release […]
Now also on 300mm wafers and headed for 5G and IoT, RF-SOI’s going strong and stronger (>20 billion chips to date) – Part 1 of 2
Soitec, the industry’s leading supplier of SOI wafers recently announced it’s in high-volume manufacturing of a 300mm version of its wildly successful RFeSI line (see press release here). What’s it all about? FEMs. RF front-end module – aka FEM – chips handle the back-and-forth of signals between the transceiver and the antenna. FEMs built on […]
China Design Conference (April 2016) Adds RF-SOI Design Track
EDI CON China 2016, taking place April 19-21 in Beijing at the China National Convention Center (CNCC) will feature a keynote talk by GlobalFoundries‘ Peter Rabbeni, Sr. Director, RF BU Business Development & Product Marketing. The talk, entitled, “RF SOI: Revolutionizing Radio Design Today and Driving Innovation for Tomorrow”, will kick off the newly added RF-SOI […]
RF-SOI Innovator JP Raskin (his team’s work is in your smartphone) Awarded Blondel Medal
RF-SOI substrate guru Jean-Pierre Raskin, whose team at UCL* has driven the technology behind the most advanced wafer substrates for RF applications, has been awarded one of the highest honors in electronics: the prestigious Blondel Medal. The technology he pioneered is now in virtually all the world’s smartphones, and used by just about every RF […]
Great FD-SOI start for 2016: Samsung, GF, Renesas, NXP/Freescale, ST, Soitec
Just a month into 2016 and we already have a raft of FD-SOI news from Samsung, GlobalFoundries, NXP/Freescale, Renesas and more. And of course RF-SOI continues ever stronger. Here’s a quick update of what we’ve been seeing, starting with news from the recent SOI Consortium forum in Tokyo. Many of the presentations are now available on […]
VLSI Research names Soitec CEO to 2015 All Stars of the Semiconductor Industry
VLSI Research Chip Insider has named Soitec CEO Paul Boudre to its roster of 2015 All Stars of the Semiconductor Industry. (See the announcement here.) Boudre was cited for “…successfully re-organizing Soitec back to its core business as a leading innovative engineered substrate supplier. His first year results are already astounding, with very high growth […]
Interview (part 2 of 2): Leti Is a Catalyst for the FD-SOI Ecosystem. CEO Marie Semeria Explains Where They’re Headed
From wafers to apps, Leti has been the moving force behind all things SOI for over 30 years. Now they’re the powerhouse behind the FD-SOI phenomenon. CEO Marie-Noelle Semeria shares her insights here in part 2 of this exclusive ASN interview as to what Leti’s doing to drive the ecosystem forward. (In part 1, she […]
Interview: Leti Is the Moving Force Behind FD-SOI. CEO Marie Semeria Explains the Strategy (part 1 of 2)
From wafers to apps, Leti has been the moving force behind all things SOI for over 30 years. Now they’re the powerhouse behind the FD-SOI phenomenon. CEO Marie Semeria shares her insights here in part 1 of this exclusive ASN interview as to what makes Leti tick. In part 2, we’ll talk about Leti’s new […]
TowerJazz Cites Strong RF-SOI Growth as Driving force in TX Fab Acquisition
With the acquisition of Maxim’s 8-inch fab in San Antonio, Texas, TowerJazz plans to quickly qualify its core specialty technologies, including its advanced Radio-Frequency Silicon-on-Insulator (RF-SOI) offering, to serve the substantial growth in demand from its customers. (See press release here.) The proposed purchase will expand TowerJazz’s current worldwide manufacturing capacity, cost-effectively increasing production by […]
Leti Develops 22nm FD-SOI Local-strain Techniques to boost performance and lower power consumption
CEA-Leti announced it has developed two techniques to induce local strain in FD-SOI processes for next-generation FD-SOI circuits that will produce more speed or lower power consumption and improved performance. (For more details, read the press release here.) Targeting the 22/20nm node, the local-strain solutions are dual-strained technologies: compressive SiGe for PFETs and tensile Si […]