The organizing committee of the EuroSOI-ULIS conference, which will be held in Grenoble on the 1st-3rd of April 2019, has issued a first call for papers. The deadline is 15 January 2019. Here are the submission guidelines, and here is a poster you can share with colleagues.
If you’ve never been, you should put it on your list. EuroSOI is one of those seminal conferences where you get a front-row seat to emerging technologies. It provides an interactive forum for scientists and engineers working in the field of new materials and advanced nanoscale devices. In fact, some of the leading technologies enabled by SOI that are now in the mainstream got their start at this conference. Within a few years of being presented here, the best work continues to evolve and star in the “big” conferences like IEDM and VLSI.
The list of luminaries on the steering and technical committees is a veritable who’s who of the SOI research ecosystem, including two winners of the IEEE Andrew Grove Award: Technical Chair Jean-Pierre Colinge and Sorin Cristoloveanu. So, if you want to get in on the ground floor of next-gen SOI, or just get a look at the early stages of the pipeline, this is a great place to do it.
One of the key objectives is to promote collaboration and partnership between players in academia, research and industry. As such it provides opportunities for cross-fertilization across materials, devices and design. The networking is excellent, and the gala dinner is always an affair to remember.
This year, papers in the following areas are being solicited:
- Advanced SOI materials and wafers. Physical mechanisms and innovative SOI-like devices
- New channel materials for CMOS: strained Si, strained SOI, SiGe, GeOI, III-V and high mobility materials on insulator; carbon nanotubes; graphene and other two-dimensional materials.
- Properties of ultra-thin films and buried oxides, defects, interface quality. Thin gate dielectrics: high-κ materials for switches and memory.
- Nanometer scale devices: technology, characterization techniques and evaluation metrics for high performance, low power, low standby power, high frequency and memory applications.
- Alternative transistor architectures including FDSOI, DGSOI, FinFET, MuGFET, vertical MOSFET, Nanowires, FeFET and Tunnel FET, MEMS/NEMS, Beyond-CMOS nanoelectronic devices.
- New functionalities in silicon-compatible nanostructures and innovative devices representing the More than Moore domain, nanoelectronic sensors, biosensor devices, energy harvesting devices, RF devices, imagers, etc.
- CMOS scaling perspectives; device/circuit level performance evaluation; switches and memory scaling. Three-dimensional integration of devices and circuits, heterogeneous integration.
- Transport phenomena, compact modeling, device simulation, front- and back-end process simulation.
- Advanced test structures and characterization techniques, parameter extraction, reliability and variability assessment techniques for new materials and novel devices.
- Emerging memory devices.
The authors of the accepted contributions will be requested to provide a 4-page paper to appear in the conference proceedings, which will be submitted to the IEEE Xplore® digital library. The authors of the best papers will be invited to submit a longer version for publication in a special issue of Solid-State Electronics. A best paper award will be attributed to the best paper by the SiNANO institute.
EuroSOI-ULIS kicks off a full week of activities in Grenoble. The day after the conference, Incize and Soitec are sponsoring a workshop on RF-SOI materials, devices, circuits and performance.
And towards the end of the week, there are other important satellite events. The 1st open IRDS International Roadmap for Devices and Systems European Conference (April 4th, 2019) is jointly organized by the USA, Japan and EU, and sponsored by the IEEE and SiNANO Institute. Then the week finishes out with the IEEE ICRC International Conference on Rebooting Computing (April 5th, 2019).
Grenoble the first week of April 2019 is clearly the place to be.